Advanced,
six-issue RISC86® superscalar microarchitecture
•Ten parallel specialized execution units
•Advanced two-level branch prediction
•Speculative execution
•Full out-of-order execution
•Register renaming and data forwarding
•Issues up to six RISC86 instructions per clock
The industry's first nine-issue
superpipelined, superscalar x86 processor microarchitecture designed for high clock frequencies:
•Multiple parallel x86 instruction decoders
•Three out-of-order, superscalar, fully pipelined floating point execution units, which execute
all x87 (floating point), MMX and 3DNow! instructions
•Three out-of-order, superscalar, pipelined integer units
•Three out-of-order, superscalar, pipelined address calculation units
•72-entry instruction control unit
•Advanced dynamic branch prediction